Characteristics of CPU
Earlier CPUs were usually square, owing to the arrangement of contacts in grid array . Before the year 1981, chips were arranged in a rectangular a pin manner known as Dual In-line Package or DIP (2 rows of 20 pins). Some integrated circuits using DIP form factor still exist. For PC CPUs, the DIP form factor is not in use anymore. It is replaced by the Land Grid Array (LGA) form factor that is primarily in use.
Intel and AMD brands use an inverted socket/processor combination extensively. In LGA packaging the pins are placed on the motherboard, whereas the processor packaging comprises mates for these pins. Like PGA, the LGA derives its name from landmarks on the processor. Lands are a metallic grid of contact points placed on the bottom of the CPU. It is easy to identify the processor on a motherboard as it lies flat on it along With a fan and a large heat sink.
Modern processors have several characteristics as follows:
- Cache size/type
- Virtualising support
- Integrated CPU
- Disable execute bit
The ‘clock frequency (MHz or GHz) indicates the speed of the processor. Ever since PCs were put into production, oscillators have been included in the motherboard. These oscillators are basically quartz crystals with a specific geometry indicating its reaction when current passes through. These crystals vibrate in response to the passing current.
The system clock, known as crystal (XTL), checks the duration of data flow on the motherboard. The effective clock rate (FSB speed) depends on how the front side bus uses clock. Different RAM types compute FSB differently. The CPU produces its own internal clock rate by multiplying the FSB speed. This internal clock rate is known as the third speed.
In lieu of complicated physics and mathematical calculations, the front side bus frequency may not be in line with the internal frequency. This is used by CPU to latch data and instructions through the pipelines. This discrepancy between numbers is due to the CPU’s capability to divide the clock signal received from external oscillator (driving the front side bus) into multiple regular signals for its own internal use. It is possible to purchase different processors rated for different speeds even for a single motherboard with rated front side bus. This is where all the processors can become compatible with the motherboard. The internal clock rate of CPU can also be adjusted via BIOS settings.
A multicore architecture implies that the processor has multiple separate processor within the package. The application and OS treat these processors as similar to multiple processors in separate sockets. In case of the hyperthreading processor, Symmetric Multiprocessing (SMP) must be supported by the OS in order to benefit from these separate components. SMP is a technique where two or more physical CPUs fasten the computer system. There is no benefit if these applications that run on SMP systems do not support parallel processing.
The most common and precise examples of multicore technology are the dual-core and quad-core processors. Thenumeric component on Intel’s Core 2 label does not denote the fact that it has two cores. The Core series of these 32-bit mobile CPUs have Solo or Duoprocessing cores on a single die (silicon wafer). The same dual-core die is used for both the Core CPU classes.
In case of earlier Core Solo processors, the second core was disabled. The 2nd generation of the Core series is represented by a 64-bit Core 2 product line. Intel mobile and desktop computing are both united by Core 2. Note that a separate Pentium M was present in the Pentium 4 family for mobile computing purposes. The term Core micro architedture used by Intel is for describing and marketing microcode of certain processors.
Unlike Core 2 processors, the Core processors are not based on Core micro architecture. Solo (mobile only), Duo and four core (Quad) are the implementations of Core 2 processors. There is a single die in Solo and Duo, while there are two Duo dies in Quad processors.
The Duo and Quad models have a more capable extreme version. Some processors may also contain an odd number of multiple cores. For example, the AMD’s Phenom series. The most common implementation of multiple odd cores is the triple-core processor (three cores).
System memory is the area where all the data for programs and the currently opened files are stored by the computer. Up-to-date processed instructions and data are stored in CPU registers. There is another high-speed memory besides the ‘system memory’ known as ‘cache memory’. This stores data from frequently used addresses. It also improvises and enhances performance by pre-loading data from ‘slow system memory’ to CPU.
CPU throttling is a technique that enables reduction in the operating frequency of the CPU, when there is less demand for using battery. It is very common in processors of mobile devices where heat generation and battery drain are main causes of full power usage. For example, a utility with lower CPU clock frequency than expected may lead to throttling. This is desired only when the load on the system requires a full-throttle operation.
In modern-day CPUs, the burden imposed by software-based virtualisation is eased by ‘virtualisation support’ in hardware. In contrast to AMD’s AMD-V (V for virtualization) technology that is widely inclusive to AMD’s CPUs, Intel uses Virtualisation Technology (VT). This is applied for market segmentation of concurrently manufactured CPUs. Intel VT is found on Core 2 Duo processor in E6000, and most of the E8000 series. Note that Intel VT is not used in E7000 series. In some instances, virtualisation support should be enabled from the BIOS before its use. To check VT support in an Intel processor, download the Intel Processor Identification utility.
Architecture: 32- and 64-Bit Processors
The set of data lines between the primary memory and CPU of the PC can be 32 or 64 bits wide, among other widths. A wider bus denotes greater data processing per unit time. So, this results in more amount of work. Note that in the CPU, internal registers may only be 32-bit wide. In case of a 64-bit systems bus, information can be simultaneously received by two separate pipelines. The 64-bit CPUs with 64-bit internal registers can run x64 versions of Microsoft OS. Note that the external system data bus is always 64 bits wide or more.
Intel and AMD manufacture lower-power CPUs with built-in Graphics Processing Units (GPUs) for Netbook and embedded markets. Some specialised functionalities have always been addedonto the die of CPUs. For example, the Math co-processors (complex features). A GPU (basically a large chip on the graphics adapter) is one of the most intricate features t° be integrated into CPUs. Apart from minimizing the amount of necessary off-package communication, these take much burden off the CPU. Thus, GPUs enhance overall system performance. Furthermore, these are much smaller than standard CPUs. Intel Atom and AMD Fusion lines of CPUs along with built-in GPUs have paved way for integration of other complex systems into future processors.
Disable Execute Bit
Disable Execute bit, also called the ‘no-execute’ bit, is the operating system’s setting that refuses to execute any code placed into a given memory location. It therefore, works for an area of memory only. This feature is generally seen in modern CPUs. The Disable Execute bit leaves negligible chance for any malicious buffer overrun attacks to be successful.
After the advent of the Intel 80286 processor, a similar non-NX based support feature has come into existence. A NX leads to more granular linear addressing whereas contrastingly, the 286protected all the segments at a time. Termed as Data Execution Prevention (DEP), NX support commenced with Windows XP. Note that the NX bit was termed as eXecute Disable (XD) bit by Intel.
As computer components work really fast there is lot of heat generated. This increased temperature may harm the components. To prevent such hazards cooling systems have been introduced in the CPU. The following section discusses about various cooling systems or elements related to processors.